The present invention relates to an electrolytic copper plating bath and a plating process therewith which show excellent filling properties in plating of a substrate having blind via-holes with small diameter and high aspect ratio and which are suitable also for performing via-filling plating and through-hole plating simultaneously for a substrate having both blind via-holes and through-holes.
With the progress of reduction in size of electronic component parts and attendant on the demand for enhanced degrees of integration, the packaging has also been shifting from the peripheral terminal mounting and area terminal mounting toward the three-dimensional mounting. Therefore, in relation to semiconductor chips and interposers, researches of conduction or junction by through-electrodes have been under toward practical use thereof. In the case of the through-electrodes, like in the cases of via-filling for printed circuit boards and copper Damascene process, there is a demand for filling the blind via-holes with a copper plating film by copper electroplating. Besides, in the case of the printed circuit boards, a process for performing via-filling plating and through-hole plating simultaneously has come to be needed.
In a copper sulfate plating bath used for the via-filling plating process, there are used, as additives, a plating accelerator called a brightener which is a sulfur-containing organic substance, and plating suppressors called a carrier which is a polyether compound and a leveler which is a nitrogen-containing compound. In general, the brighteners are comparatively higher in diffusion rate, whereas the carriers and levelers are comparatively lower in diffusion rate. Hitherto, there has been adopted a technique in which a leveler showing a particularly low diffusion rate is used in a copper sulfate plating bath for via-filling, whereby deposition of the plating on the substrate surface side of blind via-holes (the side surface upper end portions of blind via-holes) is suppressed, and the inside of the blind via-holes is filled with the plating.
In such via-filling plating for substrates or boards, the blind via-holes to be filled up have had a large diameter of 50 μm or more and a low aspect ratio of 1 or less; thus, the blind via-holes have been comparatively flat in shape. Attendant on the progress of the degree of integration, however, the blind via-holes to be filled up have come to have a smaller diameter and a higher aspect ratio. Particularly, the blind via-holes for the purpose of forming through-electrodes have a small diameter of several micrometers to several tens of micrometers and a depth of about 100 μm; thus, there is a demand for filling up the blind via-hole with a high aspect ratio by a via-filling plating process. Incidentally, in a copper Damascene process, the absolute value of hole depth has been about 1 μm, though the aspect ratio has been high.
In the cases where the blind via-holes have a smaller aperture diameter or a large depth, the potential difference between the substrate surface side and a bottom portion of the blind via-hole is large, so that the current distribution in the inside of the blind via-hole would be worsened. Therefore, where there is no effect of additive, deposition near the surface is more vigorous than deposition in the bottom portion, so that a cavity is generated, and the blind via-holes cannot be filled up with the copper plating film. In addition, as to the difference in concentration gradient generated by diffusion of the plating solution, i.e., the thickness of the diffusion layer, the difference thereof between the vicinity of the surface and the bottom portion of the blind via-hole is large, with the result of large thickness at the blind via-hole bottom, in the cases where the blind via-holes have a small aperture diameter or a large width. FIG. 1 shows a schematic diagram for illustrating the potential and diffusion layer conditions in via-filling.
The via-filling is performed the difference in diffusion rate between the leveler and the brightener. The leveler is lower than the brightener in diffusion rate, so that the leveler is supplied to the substrate surface and the blind via-hole surface side where the diffusion layer is thinner, thereby suppressing the plating. On the other hand, the supply of the leveler cannot catch up with the supply of the brightener on the blind via-hole bottom side where the diffusion layer is thicker, so that the plating-accelerating effect predominates there. As a result, the plating film preferentially grows starting from the blind via-hole bottom side, whereby the blind via-holes are filled up.
However, in the case of filling up a blind via-hole having a high aspect ratio, the use of a leveler (e.g., Janus green or the like) effective for via-filling plating in the cases of blind via-holes having a low aspect ratio according to the conventional art results in that, since the diffusion rate of the leveler is too low, even a slight thickening of the diffusion layer (toward that on the blind via-hole bottom side) on the substrate surface side of the blind via-holes causes the leveler supply to be insufficient, and a sufficient plating suppression cannot be obtained. Therefore, on the blind via-hole substrate surface side where the potential is higher and the copper ion supply is greater as compared with the blind via-hole bottom side, the plating film grows faster than at the blind via-hole bottom portion, resulting in the formation of a cavity in the vicinity of the blind via-hole bottom portion.
Besides, where simultaneous plating of blind via-holes and through-holes is conducted in a plating solution using a leveler with a low diffusion rate, the blind via-holes can be filled up, but, in the through-hole, the plating suppression of the leveler is concentrated on the through-hole corner area where the diffusion layer is thinnest, with the result of formation of a thinner plating film in this area. This condition, as it is, is accompanied by a considerably bad reliability of conduction; to cope with this problem, therefore, further time and steps would be required, i.e., the plating process may take a longer time, or a treatment for making the substrate conductive may be needed.